الثلاثاء، 24 ديسمبر 2013

Not able to get correct simulation waveform result

You currently sample the address in one cycle, then drive the data in the next cycle using sequential logic. You need data to be a combinational decode of your address.

Change:

always @(posedge clk)

to:

always @*

But, then there is no need for the clk input to input_ram.


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